This invention relates to an inspection method and system to specify manufacturing processes in which measures should be taken against particles or pattern defects in the manufacture of a wafer. In this specification, particles and/or pattern defects are simply called defects.
Yield is a good dies ratio which is calculated using the results of a probing test, which is final electrical test in the process of manufacture of a wafer. That is, yield is a ratio of good dies to all dies of a wafer. To improve yield, it""s important to calculate the yield impact of each manufacturing process and to take measures in the manufacturing process which has great yield impact.
Prior methods to quantify yield impact are as follows:
(1) A Correlation Analysis Between Yield and the Number of Defects
In this method, particle inspection or pattern defect inspection is performed every time a layer is formed on a wafer, and then the correlation analysis between yield and the number of defects is calculated based on results of a particles inspection or pattern defect inspection (See FIGS. 4(a) and 4(b)). According to this method, users can determine yield impact statistically.
However, this method must be performed on the premise that defects occur randomly on the wafer and that the inspection results follow the Poisson distribution. As shown in FIG. 4(a), the situation wherein yield decreases as the number of defects increases is an ideal correlation relation between yield and the number of defects. The slope of correlation relation of FIG. 4(a) represents yield impact per single detect. On the other hand, as shown in FIG. 4(b), in the case wherein clustered defects occur or defects concentrate at one area in a wafer due to equipment problems, the correlation relation between yield and the number of defects becomes indistinct, or in the worst case, the yield is likely to increase as the number of defects increases. This situation is opposite that of the ideal correlation relation shown in FIG. 4(a).
Methods for solving these problems are disclosed in the papers xe2x80x9cModification of Poisson statistics: Modeling defects induced by diffusionxe2x80x9d written by O. Paz et al in the IEEE Journal of solid-state Circuits, vol. SC-12, pp. 540-546 (1977), and xe2x80x9cClustered Defects in IC Fabrication: Impact on Process Control Chartsxe2x80x9d written by D. J. Friedman et al in the IEEE Transactions on Semiconductor Manufacturing, vol. 4, No. 1 (1991). However, these prior methods can""t take measures against false detection by an inspection tool.
And, in the paper xe2x80x9cStatistical Micro Yield Modelingxe2x80x9d written by Allan Y. Wong, in Semiconductor International, November, 1996, pp. 139-148, yield elements are resolved into systematic elements and random elements, and then the correlation relation of each element, between yield and the number of defects is analyzed. However, this prior method also can""t take measures against false detection by an inspection tool.
(2) Kill Ratio Analysis Method
This method is disclosed in the paper xe2x80x9cYield Monitoring and Analysis in semiconductor manufacturingxe2x80x9d written by S. Hall et al in the SEMICON KANSAI ""97, ULSI technical seminar, pp. 4/42-4/47, (1997). As shown in FIG. 5, particle inspection or pattern defect inspection are performed every time each layer is formed on a wafer, and then the number of good dies a, c and the number of bad dies b, d are calculated based on the result of the final test(probing test). The value xe2x80x9caxe2x80x9d is the number of good dies in the dies without particles. The value xe2x80x9cbxe2x80x9d is the number of bad dies in the dies without particles. The value xe2x80x9ccxe2x80x9d is the number of good dies in the dies with particles. The value xe2x80x9cdxe2x80x9d is the number of bad dies in the dies with particles. After this calculation, the yield of the dies without defects and the yield of the dies with defects are calculated, and the kill ratio of each layer is also calculated. According to the kill ratio obtained by this method, users can determine the number of bad dies which contain by defects. And, according to this method, the yield impact can be calculated without influence from process margin failure, such as process size and film thickness. However, this prior method also can""t take measures against false detection by an inspection tool.
(3) Critical Area Analysis Method
This is a method to determine kill ratio depending on the area in the die by checking the a CAD data of circuit pattern with the size or position of defects. The method of determining kill ratio is disclosed in the paper xe2x80x9cModeling of defects in integrated circuit photolithographic patternsxe2x80x9d written by C. H. Stapper in the IBM Journal of Research and Development, Vol. 28, No. 4, July, 1984, pp. 461-475, and in the paper xe2x80x9cModeling the Critical Area in Yield forecastsxe2x80x9d written by A. V. FerrisPrabhu in the IEEE Journal of Solid-state Circuits, Vol. SC-20, No. 4, August, 1985, pp. 874-877. U.S. Pat. No. 5,598,341 discloses a yield control system using a critical area analysis method. This method can analyze more accurately than both the correlation analysis method and the kill ratio analysis method because it uses a circuit pattern. However, this prior method also can""t take measures against false detection by an inspection tool and clustered defects.
False detection by an inspection tool means that non-real particles or nonreal pattern defects are, detected by the inspection tools as real particles or real pattern defects. For example, in case a film condition on a wafer is different from a normal film condition, if the sensitivity of the inspection tools is high, the film condition is likely to be detected as real particles or real pattern defects. And, if the lighting of the inspection tool changes value, the inspection tool is likely to detect non-real particles or non-real pattern defects as real particles or real pattern defects.
As mentioned above, the prior art can""t take measures against false detection by inspection tools.
As mentioned above, the prior art can""t take measures against false detection by inspection tools. Therefore, it is difficult to quantify yield impact acolirately by using the prior yield impact quantification methods because the prior methods are influenced by clustered defects, peculiar detect distribution on a wafer, false detection by inspection tools, and a disturbance such as process margin failure.
And, the prior methods require extraction of adder defects. As shown in FIG. 6, adder defects are defects which have occurred on a wafer newly. For example, in FIG. 6, detected defects which are detected at first inspection (1) are adder defects of inspection (1). Next, at inspection (2), the detected defects which are detected at inspection (1) are taken from detected defects which are detected at inspection (2), and then the result of this calculation becomes adder defects of inspection (2). Next, at inspection (3), detected defects which are detected at inspection (1) and detected defects which are detected at inspection (2) are taken from detected defects which are detected at inspection (3), and then the result of this calculation becomes adder defects of inspection (3). For the remainder of the inspection (4xcx9c), the same calculation is performed to calculate adder defects of each inspection step.
However, extraction of adder defects is influenced by reproductivity of the X-Y stage of the inspection tool or alignment error. And, cluster defects are likely to be detected differently at each of the inspection steps; especially, the size of the cluster defects will be detected differently at each of the inspection steps. Therefore, it is difficult to check one layer""s defects with another layer""s defects correctly.
The purpose of the invention is to quantify yield impact accurately, especially to quantify yield impact accurately without extraction of adder defects.
To achieve the purpose of the invention, the manufacturing line is controlled in accordance with the amount of yield impact of dies without defects. This method isn""t influenced by the number of defects, the size of the defects, clustered defects, peculiar defect distribution on a wafer, false detection by inspection tools, and process margin failure. And, this method doesn""t need to extract adder defects.
The analysis method comprises one or more inspection steps for inspecting defects on a wafer, including an electrical inspection step for inspecting an electrical function of dies of the wafer, a determination step for determining whether each die is a good die or a bad die by using the results of the electrical inspection step, a calculation step for calculating the yield of dies without defects by using the results of the determination step, said defects being cumulative defects which have been detected by the inspection steps, and an output step for outputting the result of the calculation step.
The analysis method comprises one or more inspection steps for inspecting defects on a wafer, including an electrical inspection step for inspecting an electrical function of dies of the wafer, a determination step for determining whether each die is a good die or a bad die by using the results of the electrical inspection step, a calculation step for calculating the yield of dies without defects by using the results of the determination step and an amount of yield impact between inspection steps, and an output step for outputting the result of the calculation step.
The analysis system comprises one or more inspection tools to inspect defects on a wafer, including a probing tester to inspect the electrical function of dies of the wafer, and an analysis machine to determine whether each die is a good die or a bad die by using the results provided by the probing tester and to calculate the yield of dies without defects by using the results of the determination as to whether each die is a good die or a bad die and to output result of the calculation, said defects being cumulative defects which have been detected by the inspection steps.
The analysis system comprises one or more inspection tools to inspect defects on a wafer, including a probing tester to inspect the electrical function of dies of the wafer, and an analysis machine to determine whether each die is a good die or a bad die by using the results provided by the probing tester and to calculate the yield of dies without defects by using the results of the determination as to whether each die is a good die or a bad die and an amount of yield impact between inspection steps and to output the result of the calculation.
The analysis machine comprises a first memory unit to store inspection results which indicate defects on a wafer detected by one or more inspection tools, a second memory unit to store inspection results which indicate the electrical function of dies of the wafer provided by a probing tester, and processor to determine whether each die is a good die or a bad die by using the results provided by the probing tester and to calculate the yield of dies without defects by using the results of the determination as to whether each die is a good die or a bad die and to output the result of the calculation, said defects being cumulative defects which have been detected by the inspection steps.
An analysis machine comprises a first memory unit to store inspection results which indicate defects on a wafer detected by one or more inspection tools, a second memory unit to store inspection results which indicate the electrical function of dies of the wafer provided by a probing tester, and processor to determine whether each die is a good die or a bad die by using the results provided by the probing tester and to calculate the yield of dies without defects by using the results of the determination as to whether each die is a good die or a bad die and an amount of yield impact between inspection steps and to output the result of the calculation.
The yield of dies without defects represents the yield of dies without cumulative defects which have been detected by the inspection steps.
The amount of yield impact is calculated by the following formula:
An amount of yield impact=1xe2x88x92( yield of the dies without cumulative defects which have been detected until the defect inspection (kxe2x88x921))/(yield of the dies without cumulative defects which have been detected until the defect inspection (k)), k=1, 2, 3, . . . n.
The result of the inspection step indicates defects which have been detected by a particle inspection tool or a pattern defect inspection tool.
The output step produces a list showing the inspection step in order of greatness of yield impact.
The first memory unit and second memory unit are the same memory unit.
According to this invention, users can determine easily the order of priority of steps in a manufacturing process which should be taken as measures against defects. As a result, this method isn""t influenced by the number of defects, the size of the defects, clustered defects, a peculiar defect distribution on a wafer, false detection by inspection tools, and process margin failure.